⬇ Download Markdown · ⬇ Download LaTeX · ⬇ original · view original · CSV: table 1, table 2
Si-MMIC-Amplifier in SIEGET 25-Technologie • Cascadable 50 Ω-gain block • Unconditionally stable 3 2 4 • Gain |S 21 | 2 = 13 dB at 1.8 GHz 1 IP 3out = +13 dBm at 1.8 GHz
• Noise figure NF = 2.2 dB at 1.8 GHz V D • Reverse isolation > 28 dB and 4
return loss IN / OUT > 12 dB at 1.8 GHz 3 • Pb-free (RoHS compliant) package Circuit Diagram
IN OUT 1 2
GND EHA07385 ESD ( E lectro s tatic d ischarge) sensitive device, observe handling precaution!
Type BGA420 Marking BLs 1, IN Pin Configuration 2, GND 3, OUT 4, VD Package SOT343
Maximum Ratings Parameter Symbol Value Unit Device current I D 15 mA Device voltage V D 6 V Total power dissipation P tot 90 mW
1 For calculation of R K/W
thJA please refer to Application Note Thermal Resistance 1 2011-07-26
Electrical Characteristics at T A = 25 °C, unless otherwise specified. Symbol Parameter Values Unit
min. typ. max.
5.4 6.7 8
Device current I D Insertion power gain |S 21 | 2 dB
17 15 19 17 - -
25 13 28 - -
IP 3out - 10 2.3 13 2.7 - P -1dB -6 -2.5 - RL in 8 11 - RL out 12 16 - Reverse isolation
Noise figure S12 mA NF Intercept point at the output
1dB compression point
Return loss input
Return loss output
dBm dB Typical biasing configuration + V D
100 pF
RF OUT 100 pF 10 nF
4 3
BGA 420
1 100 pF 2
GND RF IN EHA07386 Note: 1) Large-value capacitors should be connected from pin 4 to ground right at the device
to provide a low impedance path. 2) The use of plated through holes right at pin 2 is essential for pc-board-applications. Thin
boards are recommended to minimize the parasitic inductance to ground.
2 2011-07-26
f S 11 GHz MAG S 21 S 12 S 22 ANG MAG ANG MAG ANG MAG ANG
0.1 0.5686 -8.5 0.5 0.5066 -19.2 0.8 0.4404 -28.7 1 0.3904 -34.6 1.5 0.2841 -50.5 1.8 0.2343 -60.6 1.9 0.2136 -64.1 2 0.2062 -68.4 2.4 0.1688 -89.7 3 0.1558 -104.9 9.314 8.393 7.352 6.69 5.244 4.567 4.355 4.165 3.417 2.861 170.6 149.4 135.2 126.8 111.1 104 102 99.7 91.7 85.3 0.0268 0.0248 0.0236 0.024 0.0314 0.0378 0.0406 0.0426 0.0549 0.0682 12.7 11.7 25.6 35.9 57.2 63.5 66.1 67.2 71.4 73.1 0.2808 0.2613 0.2361 0.2144 0.1398 0.0979 0.0838 0.0689 0.0224 0.0284 -8.6 -3.8 -6.7 -9 -15 -18.2 -21.5 -22.2 -48 -147.5 Spice-model BGA 420 BGA 420-chip including parasitics +V T1 T501 14 R 1 14.5kΩ
R 2 140Ω R 3 2.4kΩ C 1 2.3pF C P1 0.2pF C P2 0.2pF C P3 0.6pF C P4 0.1pF R 2
13 R 1 IN OUT
R 3 C 1 11 C
P3 T1 C P1 C P4 C P2 12
GND EHA07387 3 2011-07-26
Transistor Chip Data T1 (Berkley-SPICE 2G.6 Syntax) :
VAR = 34.368 V IKR = 0.25052 A ISC = 0.037223 fA
CJE = 3.7265 fF VJE = 0.70367 V MJE = 0.37747 TF = 4.5899 ps XTF = 0.3641 - VTF = 0.19762 - V ITF = 1.3364 mA PTF = 0 deg CJC = 96.941 fF VJC = 0.99532 V MJC = 0.48652 - XCJC = 0.08161 - TR = 1.4935 ns CJS = 0 fF VJS = 0.75 V MJS = 0 - XTB = 0 - EG = 1.11 eV XTI = 3 - FC = 0.99469 - TNOM 300 K
Extracted on behalf of Infineon Technologies AG by: Institut für Mobil-und Satellitentechnik (IMST)
For examples and ready to use parameters please contact your local Infineon Technologies distributor or sales office to obtain a Infineon Technologies CD-ROM or see Internet: http://www.infineon.com/silicondiscretes
4 2011-07-26
Insertion power gain |S 21 | 2 = f (f) Insertion power gain |S 21 | 2 = f (f)
V D , I D = parameter T A = parameter
TA=-20°C TA=+25°C
|S 21 | 2
|S 21 | 2 15 16 14 12 10 10
8 6
5 4 2 0 -1 10 10 0 GHz 10 0 -1 10 1 10 0 GHz
f10 1 10 1 f Noise figure NF = f (f) Noise figure NF = f (f)
V D = 3V V D ,I D = parameter T A = parameter
5 3.5 dB dB 2.5 NF NF
TA=+75°C TA=+25°C TA=-20°C 3
2 1.5 2 1 1
0.5 0 -1 10 10 0 GHz 10 0 -1 10 1
f10 0 GHz
f5 2011-07-26
Intercept point at the output Intercept point at the output
V D ,I D = parameter T A = parameter
20
dBm 16 12
| 3out | 14 | 3out | 8 | |
|---|---|---|---|---|
| IP | 12 | IP | 7 | TA=-20°C |
| TA=+25°C | ||||
| 10 | 6 | TA=75°C |
3 4
2
2 0 -1 10 1 10 0 GHz 10 0 -1 10 1
f10 0 GHz 10
f6 2011-07-26 1
Package Outline
0.1 MAX. 1.3
0.1
A1 2 0.1 MIN. 0.15 1.25 ±0.1 3 2.1 ±0.1 4 0.3 +0.1 -0.05 +0.1 0.15 -0.05 0.6 +0.1 -0.05 4x
0.2 M A 0.1 M Foot Print 1.6 0.8 0.6 1.15
0.9 Marking Layout (Example)
Manufacturer 2005, June Date code (YM)
BGA420 Type code Pin 1 Standard Packing
0.2 2.3 8 4 Pin 1 2.15 1.1 7 2011-07-26
Edition 2009-11-16 Published by Infineon Technologies AG 81726 Munich, Germany
2009 Infineon Technologies AG All Rights Reserved.
Legal Disclaimer The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics. With respect to any examples or hints given herein, any typical values stated herein and/or any information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights of any third party.
Information For further information on technology, delivery terms and conditions and prices, please contact the nearest Infineon Technologies Office (<www.infineon.com>).
Warnings Due to technical requirements, components may contain dangerous substances. For information on the types in question, please contact the nearest Infineon Technologies Office. Infineon Technologies components may be used in life-support devices or systems only with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered.
8 2011-07-26